Updated on 2024/12/19

写真a

 
YAMAMURA Kiyotaka
 
Organization
Faculty of Science and Engineering Professor
Other responsible organization
Electrical, Electronic, and Communication Engineering Course of Graduate School of Science and Engineering, Master's Program
Electrical Engineering and Information Systems Course of Graduate School of Science and Engineering, Doctoral Program
Contact information
The inquiry by e-mail is 《here
Profile
Kiyotaka Yamamura was born in Tokyo, Japan, on December 19, 1959. He received the B.E., M.E., and D.E. degrees, all in electronics and communication engineering, from Waseda University, Tokyo, Japan, in 1982, 1984, and 1987, respectively. From 1985 to 1987, he was a Research Assistant with the School of Science and Engineering, Waseda University. From 1988 to 1998, he was an Associate Professor with the Department of Computer Science, Gunma University, Kiryu, Japan. Since 1999, he has been a Professor with the Department of Electrical, Electronic, and Communication Engineering, Chuo University, Tokyo, Japan. His research interests include numerical analysis of nonlinear circuits and systems. From 2009 to 2010, he was a chair of the IEICE Technical Committee on Nonlinear Problems. He received the Niwa Memorial Award from the Niwa Memorial Foundation in 1986, the Shinohara Memorial Young Engineer Award from IEICE in 1986, the Inoue Research Award for Young Scientists from the Inoue Foundation in 1989, the TELECOM System Technology Awards from the Telecommunications Advancement Foundation in 1990, 1999, and 2002, the Best Paper Award from IEICE in 1999, the IBM Japan Science Prize in 1999, the Ohm Technology Award from the Promotion Foundation for Electrical Science and Engineering in 2000, the Achievement Award from the Information Processing Society of Japan (IPSJ) in 2003, the Funai Information Technology Prize from the Funai Foundation for Information Technology in 2004, the Ichimura Prize in Technology (Meritorious Achievement Prize) from the New Technology Development Foundation in 2004, the IEEE ICCCAS Best Paper Award in 2007, and the IEEE APCCAS Best Paper Award in 2016. He also received the Research Award of Chuo University in 2000, 2001, 2003, 2004, 2005, 2008, and 2017. Dr. Yamamura is a Fellow of IEICE.
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Degree

  • 工学博士 ( 早稲田大学 )

Education

  • 1987.3
     

    Waseda University   Graduate School, Division of Science and Engineering   doctor course   completed

  • 1982.3
     

    Waseda University   School of Science and Engineering   graduated

Research History

  • 1999.4 - 2008.3

    上智大学理工学部電気・電子工学科 非常勤講師   Faculty of Science and Technology

  • 1999.4 -  

    中央大学理工学部電気電子情報通信工学科 教授

  • 1999.4 -  

    ~ 中央大学理工学部電気電子情報通信工学科 教授

  • 1998.4 - 1999.3

    中央大学理工学部電気電子情報通信工学科 助教授   Faculty of Science and Engineering, Department of Electrical, Electronic, and Communication Engineering

  • 1997.4 - 1998.3

    中央大学大学院理工学研究科電気電子工学専攻 兼任講師

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Professional Memberships

  • 電子情報通信学会

  • 米国電気電子学会

  • Treasurer of IEEE Circuits and Systems Society Tokyo Chapter

  • Member of the Technical Program Committee of 1991 IEEE International Symposium on Circuits and Systems

Research Interests

  • "Numerical Computation,Computer simulations"

  • Numerical computation Computer simulations

  • 数値計算

  • 計算機シミュレーション

  • Numerical Computation,Computer simulations

Research Areas

  • Informatics / High performance computing

Papers

  • An efficient algorithm for finding all solutions of nonlinear equations using parallelogram LP test Reviewed

    Kiyotaka Yamamura

    Journal of Computational and Applied Mathematics   382   113080   2021.4

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    Language:English   Publishing type:Research paper (scientific journal)   Publisher:Elsevier  

    This paper presents an efficient algorithm for finding all solutions of nonlinear equations using linear programming. This algorithm is based on a simple test (called the LP test) for nonexistence of a solution to a system of nonlinear equations in a given region. In the conventional LP test, a system of nonlinear equations is formulated as a linear programming problem by surrounding component nonlinear functions by rectangles. In the proposed algorithm, we first use rectangles, and when the nonlinearity of functions becomes weak, we switch to parallelograms. It is shown that we can use the dual simplex method throughout the algorithm by applying the variable transformation to the oblique coordinate system, by which the LP test becomes more efficient. Moreover, since polygons with proper sizes are used, the LP test becomes more powerful. By numerical examples, it is shown that the proposed algorithm is more efficient than the conventional algorithms using rectangles only or parallelograms only. We also consider the special case where component nonlinear functions are locally convex and monotone, and propose an efficient LP test algorithm using rectangles and triangles.

    DOI: 10.1016/j.cam.2020.113080

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  • Finding All Characteristic Curves of Piecewise-Linear Resistive Circuits Using an Integer Programming Solver Reviewed

    Takumi Kuramoto, Kiyotaka Yamamura

    Proceedings of 2019 IEEE Workshop on Nonlinear Circuit Networks   79 - 82   2019.12

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    A simple and efficient method is proposed for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver. In this method, the problem of finding all characteristic curves is formulated into a mixed integer programming problem, and it is solved by an integer programming solver CPLEX. It is shown that the proposed method can be implemented easily without writing complicated programs. It is also shown that all characteristic curves are obtained by solving a mixed integer programming problem only once. Numerical examples are given to confirm the effectiveness of the proposed method.

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  • An efficient method for finding all characteristic curves of piecewise-linear resistive circuits using integer programming Reviewed

    Takumi Kuramoto, Kiyotaka Yamamura

    Proceedings of 2019 IEEE Asia Pacific Conference on Circuits and Systems, PrimeAsia 2019   41 - 44   2019.11

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

    DOI: 10.1109/PrimeAsia47521.2019.8950733

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  • Gratitude to homotopy methods and longing for all solutions Invited

    Kiyotaka Yamamura

    電子情報通信学会総合大会ソサイエティ特別企画フェロー記念講演会   NK-1-1   2019.4

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    Language:Japanese   Publishing type:Research paper (conference, symposium, etc.)   Publisher:IEICE  

    2017年3月に電子情報通信学会からフェロー称号を戴き,大変光栄に感じております.ご推薦の労をお取りいただいた方々,並びにこれまでご指導いただいた方々に心から御礼申し上げます.あらためて自分は,人との出会いに恵まれて生きてきた人間だなと感じます.これからも微力ながら専門分野の発展のために尽くしていきたいと思います.
    本稿では,これまでの38年間に行ってきた研究活動の一部を紹介させていただきます.

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  • Finding all solutions of piecewise-linear resistive circuits using rectangular and triangular LP tests Reviewed

    Kiyotaka Yamamura, Hiroki Takahara

    Proceedings of 2018 IEEE Workshop on Nonlinear Circuit Networks   62 - 65   2018.12

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    Language:English   Publishing type:Research paper (international conference proceedings)   Publisher:IEEE  

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Books

  • An efficient homotopy method that can be easily implemented on SPICE

    Proceedings of IEEE 2006 International Symposium on Circuits and Systems  2006 

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  • An efficient and globally convergent homotopy method for finding DC operating points of nonlinear circuits

    Proceedings of the 11th Asia and South Pacific Design Automation Conference  2006 

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  • 電気工学ハンドブック

    山村清隆( Role: Sole author)

    オーム社  2000.4 

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    Language:Japanese   Book type:Scholarly book

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  • IEEE電気・電子用語辞典

    山村清隆( Role: Sole author)

    丸善  1989.4 

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    Language:Japanese   Book type:Scholarly book

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  • IEEE電気・電子用語辞典(1161頁)編集委員会実行委員として翻訳の一部を担当。原著IEEE Standard Dictionary of Electrical and Electronics Terms Edited by Fank Jay, IEEE, 1984

    岡村総吾監訳, 他編集委, 実行委員, 用語委員( Role: Sole translator)

    丸善  1985.4 

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    Language:Japanese   Book type:Scholarly book

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MISC

  • An efficient variable-gain homotopy method for finding DC operating points of transistor circuits Reviewed

    Kiyotaka Yamamura, Takumi Shimada

    Proceedings of 2018 IEEE Asia Pacific Conference on Circuits and Systems   NLP2018-86   235 - 238   2018.10

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    Language:English   Publisher:IEEE, Chengdu, China  

    DOI: 10.1109/APCCAS.2018.8605634

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  • Finding all solution sets of piecewise-linear interval equations using integer programming Reviewed

    Kiyotaka Yamamura, Hiroki Takahara, Yuichiro Takane

    Proceedings of 2017 IEEE Workshop on Nonlinear Circuit Networks   78 - 81   2017.12

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    Language:English   Publisher:IEEE  

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  • 可変利得ニュートン不動点ホモトピー法を用いた非線形回路の直流動作点解析 Reviewed

    山村清隆, 伊藤麻美, 篠原そのこ

    電子情報通信学会論文誌(A)   J100-A ( 11 )   401 - 410   2017.11

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    Language:Japanese   Publisher:電子情報通信学会  

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  • Complete analysis of fiecewise-linear resistive circuits using integer programming

    Kiyotaka Yamamura, Hiroki Takahara

    2017 European Conference on Circuit Theory and Design, ECCTD 2017   2017.10

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    Language:English   Publisher:Institute of Electrical and Electronics Engineers Inc.  

    An efficient and easily implementable method is proposed for finding complete solution sets of piecewise-linear resistive circuits. In this method, a piecewise-linear resistive circuit is first described by a generalized linear complementarity problem, and then it is formulated as an integer programming problem. Then, it is solved by the integer programming solver CPLEX. The proposed method can be implemented easily without writing complex programs, and the complete solution set can be obtained by solving integer programming problems only twice.

    DOI: 10.1109/ECCTD.2017.8093298

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  • Finding all solution sets of piecewise-linear interval equations using integer programming

    Kiyotaka Yamamura, Ryota Watanabe

    2017 European Conference on Circuit Theory and Design, ECCTD 2017   2017.10

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    Language:English   Publisher:Institute of Electrical and Electronics Engineers Inc.  

    This paper presents an efficient method for finding all solution sets of piecewise-linear interval equations using integer programming. In this method, the problem of finding all solution sets is formulated as a mixed integer programming problem, and it is solved by a high-performance integer programming solver such as CPLEX. It is shown that the proposed method can be implemented easily without writing complicated programs, and that all solution sets are obtained by solving a mixed integer programming problem only once. Numerical examples are given to confirm the effectiveness of the proposed method.

    DOI: 10.1109/ECCTD.2017.8093317

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Presentations

  • A Predictor-Corrector Method Where the Problem of Jumping onto Different Solution Curves is Improved

    Yoshiaki Kinoshita, Kiyoshi Adachi, Kiyotaka Yamamura

    2016年電子情報通信学会総合大会  2016.3 

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    Language:Japanese   Presentation type:Oral presentation (general)  

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  • Finding All Solutions of Piecewise-Linear Circuits Using Excel

    Daiki Koyama, Suguru Ishiguro, Kiyotaka Yamamura

    2015年電子情報通信学会ソサイエティ大会  2015.9 

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    Language:English   Presentation type:Oral presentation (general)  

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  • 整数計画法を用いた非線形回路の混合方程式及び状態方程式の導出

    岡本大輝, 滝裕至, 山村清隆

    電子情報通信学会総合大会  2015.3 

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    Language:Japanese  

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  • 多角形LPテストを用いた非線形回路の全解探索法

    木南翔太, 山村清隆

    電子情報通信学会ソサイエティ大会  2013.9 

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    Language:Japanese  

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  • 整数計画法を用いた区分的線形抵抗回路の完全解析

    高木謙吾, 滝裕至, 前田礼維, 山村清隆

    電子情報通信学会ソサイエティ大会  2013.9 

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    Language:Japanese  

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Works

  • 大規模集積回路の大域的求解法の開発とその実用化に関する研究

    2013.4 -  

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  • 大規模非線形システムの実用的な大域的求解法に関する研究

    2008.4 -  

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  • SPICE指向型数値解析法による大規模集積回路解析に関する研究

    2007.4 -  

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  • 大規模集積回路の大域的求解法の開発とその応用・実用化に関する研究

    2005.4 -  

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  • 非線形システムの数値解析法の開発とLSI設計への応用に関する研究

    2003.4 -  

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Awards

  • 電子情報通信学会フェロー表彰

    2017.3   電子情報通信学会   非線形システムの大域的求解法に関する研究

    山村清隆

  • 中央大学学術研究奨励賞

    2017.3   Chuo University  

    Kiyotaka Yamamura

  • IEEE APCCAS Best Paper Award

    2016.10   IEEE   解曲線追跡のための修正予測子修正子法

    Kiyotaka Yamamura, Kiyoshi Adachi

  • 中央大学学術研究奨励賞

    2008.3   中央大学  

  • IEEE ICCCAS 2007 Best Paper Award

    2007.7   IEEE   An efficient and practical algorithm for finding all DC solutions of nonlinear circuits

    Kiyotaka Yamamura, Koki Suda

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Research Projects

  • Study on globally convergent algorithms for solving nonlinear systems using mathematical techniques

    Grant number:18K04151  2018.4 - 2023.3

    Japan Society for the Promotion of Science  Grants-in-Aid for Scientific Research  Grant-in-Aid for Scientific Research (C)  Chuo University

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    Grant amount: \4420000 ( Direct Cost: \3400000 、 Indirect Cost: \1020000 )

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  • Study on practical methods for global analysis of large-scale nonlinear systems

    2008.4 - 2013.3

    文部科学省  科学研究費補助金 基盤研究(C) 

    山村 清隆

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    Grant type:Competitive

    Grant amount: \3500000

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  • SPICE指向型数値解析法による大規模集積回路解析に関する研究

    2007.4 - 2009.3

    中央大学理工学研究所共同研究 

    山村清隆

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    Grant type:Competitive

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  • 非線形システムの数値解析法の開発とLSI設計への応用に関する研究

    2003.4 - 2006.3

    中央大学理工学研究所  中央大学理工学研究所共同研究 

    山村清隆

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    Grant type:Competitive

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  • 非線形システムの数値解析法の開発とその応用・実用化に関する研究

    2002.4 - 2005.3

    文部科学省  科学研究費補助金(基盤研究C2) 

    山村清隆

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    Grant type:Competitive

    Grant amount: \2900000

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Committee Memberships

  • 2009 -  

    電子情報通信学会   非線形問題研究専門委員会 委員長